1. Field of the Invention
The present invention relates to a semiconductor device having a fin field-effect transistor and a manufacturing method thereof.
2. Description of Related Art
Along with recent miniaturization of transistors, it becomes difficult for a conventional planer transistor to suppress short channel effect. To solve this problem, a DRAM cell transistor for which a higher level of integration is required uses so-called a trench gate transistor (buried gate transistor), as disclosed in Japanese Patent Application Laid-Open No. 2011-129566 and No. 2011-129771, in which agate electrode is formed in a trench formed in a semiconductor substrate with an intervention of agate insulating film, and the gate electrode is buried below the surface of the semiconductor substrate.
In the buried gate transistor as described above, forming the gate electrode in the trench and at a portion below the surface of the semiconductor substrate allows three surfaces (bottom and both side surfaces of the trench) to serve as channels. Thus, as compared to a planer transistor in which only one surface serves as the channel, a longer channel length can be obtained with a smaller area. As a result, an occupation area of the transistor can be reduced while suppressing the short channel effect. Further improvement of characteristics of such a buried gate transistor is now demanded.